About Eridan

Eridan is a rapidly-growing startup building 5G radios to enable abundant wireless connectivity everywhere in the world. Our MIRACLE transceiver is based on a patent-protected switching architecture that decreases the amount of power required to transmit a gigabit of data by 5-10x. We’re a small team with big aspirations to put an Eridan transceiver in every wireless device in the world, and we believe in the power of teamwork and focus to enable outsized results.

About this position:

A successful FPGA Design and Verification Engineer at Eridan will have strong technical and analytical skills and will be comfortable working and solving problems both independently and collaboratively within a team. We look for engineers with initiative and persistence, who ask questions, stick with tough technical challenges, and have good communication skills. As part of a rapidly growing company, you can expect opportunities to further develop and specialize in your areas of interest.

As an FPGA Design and Verification Engineer at Eridan you will:

• Develop UVM-based verification environments, write test plans, write and execute tests, run regressions, collect coverage metric and report progress to the program
• Implement verification environments to facilitate testing of the design against reference models (written in Matlab, Python or other high level languages)
• Provide verification support to design engineering teams by simulating, analyzing, and debugging pre-silicon full-chip and block-level designs
• Assist product engineering teams with circuit and simulation support during post-silicon validation phase
• Design, implement, validate and integrate 5G radio unit (RU) layers from source models, along with block level micro-architecture design, RTL coding, simulation, and documentation
• Take responsibility for resource/power optimization and design trade-off analysis, as well as block and chip level synthesis and timing closure
• Translate models written in either C/C++, MATLAB, or Python
• Provide FPGA bring-up and system validation support
• Script and automate workflows in Python, Tcl, and GNU Make

Qualities of a Successful Candidate

• MS degree in Electrical Engineering, Computer Engineering, or other related engineering discipline
• Experience in designing data path and control RTL blocks
• 4+ years of experience with Vivado or other FPGA development software
• 3+ years of experience in UVM based verification, Verilog and SystemVerilog
• 2+ years of experience in scripting and programming languages in two or more of the following: MATLAB, Python, C/C++, Perl, Tcl, Make, Bash
• Familiarity with continuous integration development concepts
• Familiarity with Linux/Unix systems and version control systems

Preferred Qualities/Nice to Have:

• 2+ years of experience in designing DSP or digital communication system blocks (e.g. filters, transforms, PHY blocks, loops, FEC, etc.)
• Knowledge of basic concepts in RF and DSP, as well as experience with designing DSP circuits
• Familiarity with RISC-V architecture and O-RAN 7.2x Split
• Experience in the lab using instruments such as oscilloscopes and spectrum analyzers

Perks of working at Eridan

• Work on new technology that will make a significant impact on global infrastructure
• Ability to learn, develop, and advance within a flexible environment
• Collaborate with smart, passionate, and helpful co-worker
• Celebrate progress company-wide
• Christmas bonus
• Paid transportation and meal
• Flexible working hours

* Partial participation in meetings with US team can lead to them being later than 4 pm.

Eridan is an equal opportunity employer. We value and celebrate diversity and are committed to creating an inclusive environment for all employees. Qualified applicants will be considered for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. To be employed, the candidate must be a citizen of the European Union or United States of America.